Abstract

Autonomous aerospace and mechanical systems require supervisory architectures capable of determining whether candidate operating states remain mutually consistent before execution. This paper evaluates a hardware-verifiable recursive admissibility architecture derived from the SEXA computational framework using a controlled mechanical digital twin. Ten state variables are evaluated through six sequential Γ-admissibility stages against nominal trajectories and ten controlled fault classes. Parameters were calibrated on separate nominal trajectories and frozen before held-out testing. The final benchmark comprised 1,230,000 mechanical-state evaluations and achieved 97.57% classification accuracy, 95.70% fault sensitivity, 99.59% nominal-state acceptance, and a 4.30% false-admission rate. An independent scalar-threshold baseline produced an 85.55% false-admission rate. The results support recursive admissibility as a reproducible computational engineering constraint architecture under the synthetic conditions tested while preserving explicit boundaries between computational validation and physical hardware or flight validation.

Keywords

Recursive Admissibility, Mechanical Digital Twin, Fault Detection, Autonomous Aerospace Systems, Hardware Verification